The following links provide documentation and downloads of a free graphical tool for capturing, drawing, editing, and navigating hierarchical block-diagrams, and for producing corresponding structural VHDL or Verilog code. The VGUI tool is easy to learn-and-use, with a style based on popular web-browser, word-processor/drawing tools. It accommodates arbitrarily complex multi-level diagrams, while providing WYSIWYG hardcopy printouts. VGUI produces IEEE-1076 standard VHDL code or Verilog. It is not vendor-specific and can be used with any VHDL or Verilog compiler/simulator tools.
There was some initial instability in version 2.0, due to the number of new changes. Several updates/fixes have been posted since the initial release, the latest version, 2.07, was posted June 18, 2003, and is more stable.
Examples and Setup file (~0.02-MB) 3-29-1999
(Questions, Comments, & Suggestions: email@example.com)