DFT - Microelectronics and Computer Technology Corp. (MCC)

• Assist Lockheed Martin ATL in developing a comprehensive design for test (DFT) methodology that is integrated with the overall RASSP methdology
  • Develop new tools to fill gap between chip-level DFT and board-level/process system level test
  • Define a test architecture within the MYA approach that supports encapsulations and model-year upgrades
  • Develop library elements to demonstrate DFT methods and tools

• Total effort not completed due to loss of key developer and ETC exceeding allocated budget
• Effort redirected to internal Lockheed Martin ATL and other subcontractors
• Tasks completed directly lead to development of final RASSP DFT methodology document
• Completed specification for Hi-TEA and demonstrated prototype tool
• Completed draft specification for TIGER

• Hierarchical system partitioning into testable kernals
• Support for hierarchical modeling abstraction levels
• Process flow model describing candidate test strategies at various design levels
• Model libraries to support various global test strategy scenarios

IC/MCM/BOARD DFT ADVISOR (TIGER)

• Hierarchial DFT and build-in-self test (BIST) strategy advisor for chips, MCMs, and boards
• Generate test plans
• Links to test pattern generation, synthesis, and fault simulation tools