Virtual Prototyping and VHDL Simulation Support

PERFORMANCE MODELING
  • Describes a systems' time-related aspects
    • Throughput, response time, latency, utilization
  • Perform system sizing
    • Number/type processor elements, memory and buffer sizes
  • Architecture selection
    • Network topology, link bandwidths, and protocols
  • Hardware/Software
    • Partitioning, task scheduling, and flow control
  • Concept verification
    • Throughput, response time, latency, utilization
VHDL MODELING ISSUES AND TECHNIQUES
  • Network topology described directly in VHDL structure
    • VHDL signal represent interconnection links at the leaf level
  • Signals of type token used instead of actual data values
    • Common token type crucial for interoperability
  • Use asynchronous, event-driven models to minimize token-passing protocol
  • Resolved token collisions and overwrite with simple delta-delay FIFO on each port
  • VHDL-93 shared variables useful for automatically registering state information among concurrent processes
VIRTUAL PROTOTYPING
  • A comprehensive description of system's structure, function, and timing
  • Describes all application data values and transformations at all component and system interfaces
  • Verifies numerical correctness of software/hardware mapping
  • Test interactions with related systems
  • Visualize, understand, optimize, and demonstrate behavior of intended system

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Point of Contact: Carl Hein (609) 338 - 3924
or e-mail chein@atl.lmco.com

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