Design Tools Interoperability Using VHDL

TECHNICAL OBJECTIVE
  • Demonstrate the feasibility of developing a canonical representation of VHDL information that can support the integration of System-Level Design Tools

BENEFITS

  • Provides rapid and uniform approach to information sharing for Systems-Level VHDL tools
TASKS
  • Select 3 system-level design tools from the Lockheed Martin RASSP Toolset
  • Document requirements for intermediate representation of VHDL and necessary transformations and rules
  • Implement demonstration software system
  • Demonstrate developed system
  • Develop plan for creating generally applicable translation system
PRODUCTS

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WBS Element No.: 1.3.3.2
Point of Contacts:
John Welsh (609) 338 - 4223
or e-mail jwelsh @atl.lmco.com
Anthony Gadient (803) 760 - 4082
or e-mail gadient@scra.org

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