Virtual Prototype Hardware - Quickturn

• Define the role that emulation provides in the RASSP rapid prototyping methodology
• Develop the processes for performing hardware emulation
• Develop interfaces to integrate the Quickturn emulator with Mentor's Falcon Framework and the Precedence backplane

BENEFITS

• Enable true hardware/software codesign by providing Virtual Prototyping months earlier than fabricated silicon
• Provides verification throughput orders of magnitude greater than other software only verification methodologies

• Requirements defined
  • Hardware emulator integration with Mentor Falcon Framework
  • Co-simulation environment with Precedence Simulation
• HDL integration with HDL-ICE providing faster virtual prototyping using either VHDL or Verilog RTL designs
• Q-Bridge software interface to third party tools: cycle-based simulation, full timing simulation, testbench development, instruction set simulators, and design capture and debug tools