Hierarchical Electronic Hardware Design

• Ease of transformation from architectural description into hardware
• Incorporate Virtual Prototyping (VP) benefits into process
• Identify design reuse objects for implementation in RASSP reuse system
• Define and capture process in workflows to be used by enterprise system

BENEFITS

• Hierarchical virtual prototyping results in significant reduction in integration and test time

• Detailed processes captured in IDEF 3X and the enterprise system design methodology manager
  • Chassis design
  • Backplane design
  • Module/MCM design
  • ASIC design
  • FPGA design
• Varous vendor tools tied to process steps and encapsulated in the enterprise system

• Model-year architecture
• Electronics transfer of PCB designs to manfuacturing sites
• RASSP design for test methodology utilizes boundary scan and BIST
• Precedence Simmatrix Simulation Backplane
• Quickturn hardware emulation