Architecture Selection Tool Integration - JRS

• Couple NetSyn architecture tradeoff capability with other tools to support more informed decisions, iterative design process and seamless design flow

BENEFITS

• Eliminate design re-entry between architecture selection and verification
• Provides graphical capability to support architecture definition and visualization
• VHDL export of candidate architectures for verification
• Seamless design flow to PGM Autocoding Tools

• SPW export of PGM halted due to lack of market support
• PRICE import/export of architecture and parametric cost halted due to lack of market support
• CMU effort imported research export of IP for multiprocessor partitioning
• MCCI import of mapping files delayed due to resource issues; effort switched to new RASSP architecture toolset
• PMW import complete; to be used by new architecture toolset
• ADVT import/export of timing information is operational; extensions being completed under separate funding
• RDD-100interfaces complete; trivial electronic passage of basic requirement parameters may easily be replaced through paper transfer

• Development of a new RASSP integrated architecture tool has replaced this effort due to:
  • Need for better front-end export of PGM graph developmen tool
  • Tool vendor cooepration to support and market