Architecture Tool Integration

TECHNICAL OBJECTIVES
  • Develop new process for architecture selection and verification using hierarchical simulation
  • Direct and evaluate EDA suppliers to develop new tools and extend existing tools to support the hardware/software codesign process
  • Integrate/test new capability and provide feedback
  • Cost/schedule monitoring and reporting
SYSTEM LEVEL SIMULATION
  • Function and timing simulation of required processing

ARCHITECTURE LEVEL SIMULATION

  • Performance simulation to evaluate partitioning and mapping on candidate architectures
  • Functional simulation to validate autocode
  • Performance re-simulation using autocode timing
  • Hierarchical functional and performance simulation for final verification

DETAILED DESIGN SIMULATION

  • Low level simulation (RTL and below) prior to design release
BENEFITS
  • Enables mutual influence of both hardware and software early in design
  • Provides continual verification which improves quality
  • Automation of codesign early in the process and tool interoperability enables evaluation of larger design space
  • Co-verification throughout the virtual prototyping process reduces integration and test time
  • Integrated architecture toolset supported by commercial tool suppliers


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WBS Element No.: 1.2.3.1
Point of Contact: Bernie Schaming (609) 338 - 4219
or e-mail wschamin@atl.lmco.com

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